The following illustration shows a 3-bit flash ADC circuit:

- $\mathrm{V}_{\text {ref }}$ is a stable reference voltage provided by a precision voltage regulator as part of the converter circuit, not shown in the schematic.

- As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state.

- The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs.

- For $n$-bit comparator type ADC, the number of comparators required is $2^n-1$